This invention relates to an electric solid state device and a method for manufacturing the same, and more particularly to a highly reliable electric solid state device with a high electromigration resistance, among other properties, and a method for manufacturing the same.
In accordance with recent remarkable development in the integration of semiconductor integrated circuit devices such as DRAMs, etc., refining of wiring, which is used for electrically connecting elements incorporated in the device, cannot be avoided. The refining technique requires that wiring should have a higher current density and higher operation temperature than ever, and also a higher electromigration resistance for imparting a higher reliability to the device.
The reason why refined wiring, which needs to have a high current density and high operation temperature, also needs to have a high electromigration resistance is that the electromigration resistance is inversely proportional to an increase in current density and operation temperature. At present, a semiconductor material such as a metal material (e.g. Al or an Al alloy) or polysilicon is used as the material of the refined wiring. The electromigration resistance of the metal material has been enhanced by, for example, the addition of a small amount of a transition metal (e.g. Cu, Ti) or the employment of a bamboo structure (i.e. a grain boundary structure like a bamboo node structure resulting from grain growth). However, it is considered difficult for these conventional techniques to impart a high reliability to wiring of the order of 0.1 .mu.m width.
Recent research has proved that the aforementioned electromigration resistance and a stress migration resistance, due to a tensile stress occurring in wiring, can be remarkably enhanced by the employment of monocrystal wiring. In light of this, in order to obtain a high reliability, it is considered effective to make the crystal structure of a thin film for wiring to approach as close a monocrystal structure as possible.
However, in currently available semiconductor integrated circuit devices, a wire layer is formed on, for example, an amorphous thin film such as an inter-layer insulation film of silicon oxide. In this case, epitaxial crystal growth for growing a monocrystal thin film with the same crystal orientation as the under-layer cannot be performed, which means that it is very difficult to form a conductive thin film or wiring of high crystallinity.
On the other hand, the inventors of the present invention have found the following as a result of their research. A conductive thin film of an extremely high orientation is formed when an interatomic distance, calculated from the peak position of a halo pattern appearing in diffraction measurement of an amorphous thin film, is substantially equal to an interplanar space between those two adjacent specific crystal planes of the material of the conductive thin film, which are defined at least by respective atomic strings arranged in a predetermined direction in the respective planes and separated from each other by the smallest interatomic distance possible.
At the time of forming a wire layer by the above method, it is desirable to set the substrate temperature to a low value, in order to obtain a high orientation. This is because if the substrate temperature is high, a high orientation cannot be obtained. In general, however, it is preferable to set the substrate temperature to a high value, in order to grow a large grain film. Therefore, where the above method is employed, a high-orientation large-grain film is difficult to obtain.